1:00 PM - 2:00 PM
Senior Product Manager Interview
Sarah Jenkins

Location
onsite, San Diego, CA, United States
Salary
$145k – $175k/yr
Commitment
Full Time
Level
Senior (5+ years)
As a Staff Analog Layout Engineer, you will take technical ownership of the physical layout and verification of complex analog and mixed-signal integrated circuits for the ATE market. You will work across both block-level and full-chip layout using advanced process technologies ranging from 65nm CMOS to 100+V BCD.
This role offers the opportunity to solve complex layout challenges, collaborate closely with analog design engineers, and influence layout strategy across projects. You will apply your expertise in matching, parasitics, reliability, and manufacturability while helping establish best practices and drive designs through successful tapeout.
Bachelor’s degree in Electrical Engineering or a related field
Minimum of 8 years of professional experience in analog and mixed-signal IC layout design
Strong understanding of analog CMOS circuits and device physics
Solid knowledge of the IC design, qualification, and manufacturing lifecycle
Hands-on experience with industry-standard EDA tools such as Cadence, Mentor Graphics, or Tanner
Proficiency in LVS and DRC verification using Cadence or Mentor tools
The anticipated annual base salary range for this position is $145,000.00 to $175,000.00. Actual compensation will be determined based on factors such as experience, skills, qualifications, education, location, and business needs.
In addition to base salary, employees may be eligible for incentive compensation and a comprehensive benefits package. This salary range represents the Company's good-faith estimate of the compensation it reasonably expects to pay for this position at the time of posting.