
Curotec
Location
onsite, Salt Lake City, UT, United States
Commitment
Full Time
Level
Middle (2-4 years)
Job Code: 46637
Job Location: Salt Lake City, UT
Job Schedule: 9/80: Employees work 9 out of every 14 days- totaling 80 hours worked- and have every other Friday off
L3Harris in Salt Lake City is actively looking for a talented FPGA (Field Programmable Gate Array) design engineer with industry experience in signal processing techniques. We design, develop, and test communication systems, advanced electronic warfare systems and multi-function systems. L3Harris development efforts include the whole lifecycle of designs from proposals, requirement definition, coding, simulation, synthesis, place and route, verification testing, and system support. This position would focus on design, HDL coding, simulation, synthesis, place and route, and lab verification. We are looking for an engineer who enjoys challenging work with a team of talented engineers and can work well both with a team and as an individual contributor. Salt Lake City provides incredible year-round outdoor recreation options and cultural experiences, and L3Harris values your work/life balance so you can enjoy these opportunities.
Bachelor’s Degree and minimum 4 years of prior relevant experience. Graduate Degree and a minimum of 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experience.

Curotec

Addepar
True Talent Solutions Partners

Addepar

Western Governors University

CTI Consulting

KION Group